The Sphyrna HFD (Hardware Filtering Diode) is an FPGA-based hardware filtering data diode that provides unidirectional data transfer capabilities. The device is designed to be Raise The Bar compliant and manufactured in Canada with no export restrictions. The HFD features a high-capacity FPGA component with 650K logic cells and 597K flip flops, along with an integrated quad-core Arm Cortex management CPU. All filtering operations are performed at wire speed entirely in hardware logic without CPU or softCPU involvement. The device provides protocol filtering diode (PFD) functionality and advanced in-stream filtering of structured file formats. Filtering capabilities cover ISO layers 2-4, including header flags and CRC checks. The architecture separates ingress and egress interfaces in separate FPGA quads for enhanced security. Data interfaces include 25Gbps (SFP28) bidirectional ingress and TX-only egress interfaces. Logging options are flexible, supporting logging to source, destination, or via a dedicated 25Gbps logging interface. Management is available through 1Gbps Ethernet or USB-C interfaces. Security mechanisms include physical and logical unidirectional assurance, encrypted and signed rulesets with decryption performed in logic, dedicated memory for filter logic isolated from the management CPU, and the ability to provide complete protocol and encryption breaks. GPIO interfaces support anti-tamper sensors.