Virtualyzr is a pre-silicon hardware security verification tool designed for System-on-Chip (SoC) design evaluation. The tool performs security assessments at the design stage before foundry tape-out, enabling identification and mitigation of security weaknesses early in the development cycle. The tool operates through a three-stage workflow: simulation of the design through EDA tools at various conception levels (RTL, Post Synthesis, Place & Route), trace generation using mathematical consumption models on simulated results or external VCD databases, and advanced physical analysis producing complete evaluation reports. Virtualyzr supports evaluation of both hardware and software components in mixed designs, including crypto accelerators and critical software code on CPUs. The tool can perform assessments on RISC-V processors and ARM-V2 processors. The product provides two operational interfaces: a graphical user interface for analysis building and testing with ready-to-use use cases, and a command line interface for full automation and scripting-based testing. Both interfaces integrate with regression test systems. Virtualyzr supports compliance with certification standards including Common Criteria (CC AVA_VAN up to level 5), FIPS-140, ISO, SESIP, ISO/IEC 17825, and OSCCA. The tool performs side-channel analysis and fault injection attack analysis on hardware designs.